74ls93 pin diagram pin diagram and function truth table

Below is the pin diagram of the 74LS93:

• Pin 1 (CP0): Clock input for the first flip-flop (LSB)
• Pin 2 (Q0): Output of the first flip-flop
• Pin 3 (Q1): Output of the second flip-flop
• Pin 4 (Q2): Output of the third flip-flop
• Pin 5 (Q3): Output of the fourth flip-flop (MSB)
• Pin 6 (CP1): Clock input for the second stage (connected to Q0)
• Pin 7 (GND): Ground connection
• Pin 8 (MR): Master reset (active low)
• Pin 9 (VCC): Power supply (typically +5V)
• Pin 10 (Q3): Output of the fourth flip-flop (MSB)
• Pin 11 (Q2): Output of the third flip-flop
• Pin 12 (Q1): Output of the second flip-flop
• Pin 13 (Q0): Output of the first flip-flop
• Pin 14 (CP0): Clock input for the first flip-flop (LSB)

Here is the truth table for the 74LS93:

The truth table shows the output states of the four flip-flops (Q0 to Q3) based on the number of clock pulses applied. The counter resets when the MR pin is pulled low, returning all outputs to zero. This IC is widely used in applications such as frequency division, timing circuits, and digital counters.