First, what is embedded? The IEEE (Institute of Electrical and Electronics Engineers) defines embedded systems as "devices for controlling, monitoring, or assisting in the operation of machines and equipment." An embedded system is a specialized computer system that is part of a device or machine. Typically, an embedded system is an embedded processor control board where the control program is stored in ROM. In fact, all devices with digital interfaces, such as watches, microwave ovens, video recorders, and automobiles, use embedded systems. Some embedded systems also include an operating system, but most embedded systems implement full control from a single program. Defined from the application object, an embedded system is a combination of software and hardware, and can also cover auxiliary devices such as machinery. The embedded system generally recognized in China is defined as: application-centered, computer-based, software and hardware tailored to meet the strict requirements of the application system for functions, reliability, cost, size, power consumption and other special computer systems. An embedded system device generally consists of an embedded computer system and an execution device. The embedded computer system is the core of the entire embedded system, and is composed of a hardware layer, an intermediate layer, a system software layer, and an application software layer. The execution device, also known as the controlled object, can accept control commands issued by the embedded computer system to perform the specified operations or tasks. The actuator can be very simple, such as a tiny motor on the phone, which is turned on when the phone is in vibration receiving state; it can also be complicated, such as the SONY smart robot dog, which integrates multiple micro-small control motors and various sensors. Thereby, various complicated actions and various state information can be performed. Second, the composition of the embedded system First, the hardware layer The hardware layer includes an embedded microprocessor, memory (SDRAM, ROM, Flash, etc.), general device interface, and I/O interface (A/D, D/A, I/O, etc.). Adding a power circuit, a clock circuit and a memory circuit based on an embedded processor constitutes an embedded core control module. The operating system and applications can be solidified in ROM. Second, the middle layer The middle layer between the hardware layer and the software layer is also called the Hardware Abstract Layer (HAL) or the Board Support Package (BSP). The semi-system upper layer software is separated from the underlying hardware, so that the underlying driver of the system is independent of the hardware. The upper software developer does not need to care about the specific conditions of the underlying hardware, and can develop according to the interface provided by the BSP layer. This layer typically contains initialization of the underlying hardware, input/output operations of the data, and configuration capabilities of the hardware device. In fact, BSP is a layer of software between the operating system and the underlying hardware, including most of the hardware modules in the system that are closely related to the hardware. Designing a complete BSP requires two parts of the work: the BSP function of the hardware initialization of the embedded system, and the design of the hardware-related device driver. Third, the system software layer The system software layer consists of a real-time multi-tasking operating system (RTOS), a file system, a graphical user interface (GUI), a network system, and a common component module. RTOS is the foundation and development platform for embedded applications. Third, real-time system Definition: A system that can perform system functions and respond to external or internal, synchronous or asynchronous time within a specified or determined time. The difference: the general system generally pursues the average response time of the system and the user's convenience; while the real-time system mainly considers the system behavior in the worst case. Features: time constraints, predictability, reliability, and interactivity with the external environment. Hard real-time (strong real-time): The time requirements of the application should be fully satisfied, otherwise it will cause major security incidents and even cause major loss of life and property and ecological damage, such as: aerospace, military. Soft real-time (weak real-time): Although some applications have time requirements, real-time tasks occasionally violate this requirement and will not seriously affect the system operation and environment, such as monitoring systems and real-time information collection systems. Task constraints include: time constraints, resource constraints, execution order constraints, and performance constraints. Fourth, real-time system scheduling Scheduling: Given a set of real-time tasks and system resources, determine the entire process of when and where each task is executed. Preemptive scheduling: Usually a priority-driven scheduling, such as uCOS. The advantage is that the real-time performance is good, the response is fast, the scheduling algorithm is relatively simple, and the time constraint of the high-priority task can be guaranteed; the disadvantage is that there are many context switches. Non-preemptive scheduling: Usually scheduled by time slice, the task is not allowed to be interrupted during execution. Once the task occupies the processor, it must be executed or voluntarily given up, such as WinCE. The advantage is that the context switching is less; the disadvantage is that the processor has low effective resource utilization and poor schedulability. Static table driving strategy: Before the system runs, according to the time constraints and associations of each task, a certain search strategy is used to generate a running time table, indicating the starting running time and running time of each task. Priority Driven Policy: Determines the order in which tasks are executed according to the priority of the task. Real-time task classification: periodic tasks, incidental tasks, and acyclic tasks. The general structure model of the real-time system: the data acquisition task realizes the collection of sensor data, the data processing task processes the collected data, and sends the processed data to the execution organization management task control organization for execution. Fifth, embedded microprocessor architecture Von Neumann structure: program and data share a storage space, program instruction storage address and data storage address point to different physical locations of the same memory, using a single address and data bus, the program and data have the same width. For example: 8086, ARM7, MIPS... Harvard architecture: Programs and data are two independent memories. Each memory is independently addressed and accessed independently. It is a memory structure that separates program storage from data storage. For example: AVR, ARM9, ARM10... The characteristics of CISC and RISC are compared. The time P required by the computer to execute the program can be calculated by the following formula: P = I × CPI × T I: The number of instructions that are run on the machine after the high-level language program is compiled. CPI: The average number of cycles required to execute each instruction. T: The time of each machine cycle. The idea of pipeline: The subroutine that turns the serial execution of an instruction into several instructions in the CPU is executed in the CPU. Pipeline indicators: Throughput rate: The number of results from the line processor in a unit of time. If the sub-process of the pipeline takes a different amount of time, the throughput rate should be the reciprocal of the longest sub-process. Settling time: The time at which the pipeline starts working to reach the maximum throughput rate. If the time used by m sub-processes is the same, both are t, then the time T=mt is established. Byte order of information storage A, memory unit: byte (8-bit) B. The word length determines the addressing capability of the microprocessor, that is, the size of the virtual address space. C, 32-bit microprocessor virtual address space bit 232, which is 4GB. D, little endian byte order: the low byte is at the low address of the memory, and the high byte is at the high address of the memory. E, big endian byte order: the high byte is at the low address of the memory, and the low byte is at the high address of the memory. F. The storage order of network devices depends on the data link layer in the bottom layer of the OSI model. Sixth, the logic circuit foundation The logic circuit is divided into: a combinational logic circuit and a sequential logic circuit according to whether the circuit has a storage function. Combinational logic: The output of the circuit at any one time depends only on the input signal at that moment, regardless of the state of the circuit before the input signal is applied. Commonly used logic circuits include decoders and multiplexers. Sequential logic circuit: The output of the circuit at any one time is not only related to the input at that moment, but also related to the state of the circuit at that moment. Therefore, memory elements must be included in the sequential circuit. Triggers are the basis for constructing sequential logic circuits. Commonly used sequential logic circuits include registers and counters. The concept of truth table, Boolean algebra, Morgan's law, and gate circuit. The NOR (or non-) and NAND (NAND) gates are called full-featured gates and can implement any kind of logic function. Decoder: A combinatorial logic network with multiple inputs and multiple outputs. Each time an n-bit binary code is entered, at most one of the m outputs is valid. When m=2n is, it is fully decoded; when m is 2n, it is partially decoded. Since the high-level output current of the integrated circuit is small, and the low-level output current is relatively large, when the integrated gate circuit directly drives the LED, the low-level driving mode is often used. The liquid crystal seven-segment display LCD utilizes different optical characteristics of the liquid crystal with an applied electric field and no external electric field to display characters. The clock signal is the basis of the timing logic and is used to determine the appropriate update of the state in the logic unit. Synchronization is the main constraint in clock control systems. When a trigger is selected, the trigger mode is a factor that must be considered. There are two trigger modes: Level trigger mode: It has a simple structure and is often used to form a scratchpad. Edge trigger mode: It has strong anti-data interference capability and is often used to form registers, counters, etc. Seventh, bus circuit and signal drive A bus is a collection of various signal lines that are a common path for transferring data, addresses, and control information between components in an embedded system. At the same time, one binary signal can be transmitted on each path. According to the type of information transmitted by the bus, it can be divided into: data bus (DB), address bus (AB) and control bus (CB). The main parameters of the bus: Bus bandwidth: The amount of data that can be transferred on the bus within a certain period of time, generally expressed in MByte/s. Bus width: The number of bits of data that the bus can transmit at the same time, that is, the concept of bus widths such as 32-bit and 64-bit, which is often referred to as bus width. The wider the bit width of the bus, the larger the data transfer rate per second of the bus, that is, the wider the bus bandwidth. Bus frequency: The working clock frequency is in MHz. The higher the operating frequency, the faster the bus operates, that is, the wider the bus bandwidth. Bus bandwidth = bus bit width x bus frequency / 8, in MBps. Common bus: ISA bus, PCI bus, IIC bus, SPI bus, PC104 bus and CAN bus. Only devices with a three-state output can be connected to the data bus. The commonly used tri-state gates are output buffers. When the load on the bus exceeds the load capacity of the bus, a buffer or driver must be added between the bus and the load. The most commonly used is a tristate buffer, which is used for driving and isolation. The bus bus and the address bus can be shared by bus multiplexing technology. But it will bring two problems: A. It is necessary to add an external circuit to multiplex and decouple the bus signal, for example: an address latch. B. The bus speed is lower than that of the non-multiplexed bus system. Two types of bus communication protocols: synchronous mode and asynchronous mode. The solution to the bus arbitration problem is based on the concept of priority (priority). Eighth, level conversion circuit Digital integrated circuits can be divided into two categories: bipolar integrated circuits (TTL) and metal oxide semiconductors (MOS). CMOS circuits are widely used due to their extremely low static power consumption, high operating speed and strong anti-interference ability. The solution to the difficulty of TTL and CMOS circuit interface is to connect a pull-up resistor R between the output of the TTL circuit and the power supply. The value of the pull-up resistor R is determined by the high-level output leakage current IOH of the TTL. The TTL of different series should choose a different R value. Ninth, the basis of information representation and computing in embedded systems Carry count system and conversion: This is relatively simple, you should also know how to convert, there is the possibility of a problem. The representation of the number in the computer: source code, inverse code and complement code. The inverse of the positive number is the same as the source code. The inverse of the negative number is the source code of the number except the sign bit. The complement of a positive number is the same as the source code, and the complement of a negative number is one plus the inverse of the number. For example, source code B of -98 Inverse B Complement B Fixed point notation: The position of the decimal point of the number is fixed by the artificial agreement. Floating point notation: The decimal point position of a number is floating, which consists of a mantissa part and an order part. Any binary N can always be written as: N=2P×S. S is the mantissa and P is the order. Chinese character representation, to understand the transformation of GB2318-80 Chinese code and internal code. Waveform quantization parameters in speech coding (may be a simple calculation problem) Sampling frequency: The number of samples in one second, reflecting the size of the interval between sampling points. The upper limit of the human ear is 20 kHz, so the sampling frequency above 40 kHz is enough to satisfy. The sampling frequency used for CD recording is 44.1 kHz. Measurement accuracy: The quantization level of the sample. Currently, the standard sampling level has 8 bits and 16 bits. Number of channels: mono and stereo dual channels. Stereo requires twice the storage space. X. Error control coding According to the function of the code group, it can be divided into two types: error detection code and error correction code. The error detection code refers to a code that can automatically detect an error, such as a parity check code; an error correction code refers to a code that can not only detect an error but also automatically correct an error, such as a cyclic redundancy check code. Parity code, Hamming code, cyclic redundancy check code (CRC). XI, measurement system of embedded system Performance indicators: divided into component performance indicators and comprehensive performance indicators, including: throughput, real-time and various utilization. Reliability and safety Reliability is the most important and most prominent basic requirement of embedded systems. It is a guarantee that an embedded system can work normally. It is generally measured by the MTBF of the mean time between failures. Maintainability: Generally expressed as MTTR. Availability Power consumption Environmental adaptability Versatility safety Confidentiality Scalability The price in the price/performance ratio, in addition to the price of the embedded system directly, should also include installation costs, several years of operation and maintenance costs, and software rental fees. Evaluation methods for embedded systems: measurement methods and model methods The measurement method is the most direct and basic method, and two problems need to be solved: A. Determine the system parameters to be measured according to the purpose of the study. B. Choose the tools and methods of measurement. There are two ways to measure: sampling mode and event tracking mode. The model method is divided into an analysis model method and a simulation model method. The analytical model method uses some mathematical equations to describe the model of the system. The simulation model method uses the operation of the simulation program to dynamically express the state of the embedded system, and performs systematic statistical analysis to obtain performance indicators. The most used in the analytical model method is the queuing model, which consists of three parts: the input stream, the queuing rules, and the service organization. Using the model to evaluate the system requires solving three problems: designing the model, solving the model, calibrating, and validating the model. Twelfth, interface technology Flash memory (1) Flash memory is a kind of non-volatile memory, which can be divided into NOR Flash and NAND Flash according to different structures. (2) Features of Flash memory: A. Block structure: It is physically divided into several blocks, and the blocks are independent of each other. B. First erase and write: Flash write operation can only write data bits from 1 to 0, and cannot write from 0 to 1, so you must perform an erase operation before initializing the memory to initialize the pre-written data bits. Is 1. The smallest unit of erase operation is a block, not a single byte. C. Operation instruction: To perform a write operation, it must input a string of special instructions (NOR Flash) or complete a timing (NAND Flash) to write data. D. Bit reversal: Due to the inherent characteristics of Flash, one or several bits of data error O and bad blocks are occasionally generated during the reading and writing process: once the block is damaged, it cannot be repaired. The result of a corrupted block operation is unpredictable. (3) Features of NOR Flash: The application can run directly in flash without having to read the code into system RAM. NOR Flash has a very high transmission efficiency and is very cost effective in the small capacity of 1MB~4MB, but the low write and erase speed greatly affects its performance. (4) Features of NAND Flash The ability to increase extremely high density cells allows for high storage densities and fast write and erase speeds, which is why all U-disks use NAND Flash as the storage medium. The difficulty with applying NAND Flash is that flash requires a special system interface. (5) The difference between NOR Flash and NAND Flash: A, NOR Flash read speed is slightly faster than NAND Flash. B, NAND Flash erase and write speed is much faster than NOR Flash C, NAND Flash has a poor random reading capability and is suitable for continuous reading of large amounts of data. D, NOR Flash with SRAM interface, with enough address introduction to address, you can easily access every byte inside it. NAND Flash's address, data, and commands share an 8-bit bus (16-bit products are written by the company), and each time it is read or written, it uses a complex I/O interface to serially access data. E, NOR Flash capacity is generally small, usually between 1MB ~ 8MB; NAND Flash is only used in products above 8MB. Therefore, NOR Flash is only suitable for data storage as long as it is applied to code storage media. F, the maximum number of erasures per block in NAND Flash is one million, and NOR Flash is 100,000 times. G, NOR Flash can be connected like other memory, very directly used, and can run code directly on it; NAND Flash requires special I/O interface, you must write the driver before you can continue to execute other operating. Because designers can never write to bad blocks, this means that virtual images must be made on NAND Flash from start to finish. H, NOR Flash is used for code storage, communication products, network processing and other fields that require high data reliability, and is used as code flash memory; NAND Flash is used for MP3, memory card, U disk, etc. with high storage capacity requirements. The domain is becoming a data flash. 2, RAM memory (1) Features of SRAM: SRAM stands for Static Random Access Memory. It maintains a value as long as it is powered. It has no refresh cycle. The flip-flop constitutes a basic unit with low integration. Each SRAM memory cell consists of 6 transistors, so its cost is high. It has a higher rate and is commonly used in cache memories. Usually SRAM has 4 types of pins: CE: Chip select signal, active low. R/W: Read and write control signals. ADDRESS: A set of address lines. DATA: A set of bidirectional signal lines for data transmission. (2) Features of DRAM: DRAM stands for Dynamic Random Access Memory. This is a semiconductor memory that is stored in the form of a charge. Each of its memory cells consists of a transistor and a capacitor, and the data is stored in a capacitor. Capacitors can lose charge due to leakage, and DRAM devices are unstable. It must be refreshed regularly to store the data in memory. The interface of DRAM is more complicated, usually with the following pins: CE: Chip select signal, active low. R/W: Read and write control signals. RAS: Row address strobe signal, usually connected to the upper part of the address. CAS: Column address strobe signal, usually connected to the lower part of the address. ADDRESS: A set of address lines. DATA: A set of bidirectional signal lines for data transmission. (3) Features of SDRAM: SDRAM stands for Synchronous Dynamic Random Access Memory. Synchronization means that the memory work requires a synchronous clock. The internal command transmission and data transmission are based on it. Dynamic means that the memory array needs constant refresh to ensure data is not lost. It usually only works at 133MHz. (4) Features of DDRAM DDRAM stands for Double Rate Synchronous Dynamic Random Access Memory (DDR), also known as DDR. DDRAM is based on SDRAM technology. SDRAM transmits data only once in one clock cycle. It transmits data during the rising period of the clock. DDR memory transfers data twice in one clock cycle. It can rise in the clock. Data is transmitted once for each period and period. At 133MHz, the DDR memory bandwidth can reach 133×64b/8×2=2.1GB/s. 3, hard disk, CD, CF card, SD card 4, GPIO principle and structure GPIO is the most basic form of I/O, it is a set of input or output pins. Some GPIO pins can be programmed to change the direction of operation. There are usually two control registers: the data register and the data direction register. The data direction register sets the direction of the port. If the pin is set to an output, the data register will control the state of that pin. If the pin is set as an input, the state of this input pin is controlled by the logic circuit layer on the pin. 5, A / D interface (1) The A/D converter is a circuit that converts an electrical analog quantity into a digital quantity. There are many ways to implement A/D conversion. The commonly used methods are counting method, double integral method and successive pushing method. (2) Counting A/D conversion method The main components of the circuit include: comparators, counters, D/A converters and standard voltage sources. The working principle is simply that there is a counter that increments from 0 and increments by one. Each time it is incremented by 1, the value is used as the input of the D/A converter, which produces a comparison voltage VO compared with the input analog voltage VIN. . If VO is less than VIN, continue to increment by 1 until VO is greater than VIN. At this time, the accumulated value of the counter is the output value of the A/D converter. This conversion method is characterized by simplicity, but at a slower speed, especially when the analog voltage is higher, the conversion speed is slower. For example, for an 8-bit A/D converter, if the input analog value is the maximum value, the counter should count from 0 to 255, and do 255 D/A conversion and voltage comparison to complete the conversion. (3) Double integral A/D conversion method The main components of the circuit include: an integrator, a comparator, a counter, and a standard voltage source. The working principle is that, firstly, the circuit integrates the input voltage to be measured for a fixed time, and then converts to the standard voltage to perform the reverse integration of the fixed slope, and the reverse integration proceeds to a certain time, and then returns to the starting value. Due to the fixed slope, the time to reverse integration of the standard voltage is proportional to the input analog voltage value. The larger the input analog voltage, the longer the reverse integration back to the start value. As long as the time taken for the reverse integration is measured by a standard high-frequency clock pulse, the digital quantity corresponding to the input analog voltage can be obtained, and the A/D conversion is completed. Its characteristic is that it has strong resistance to power frequency interference, high conversion precision, but slow conversion speed, usually the conversion frequency is less than 10Hz, mainly used for digital test instruments, temperature measurement and so on. (4) Successive approximation A/D conversion method The main components of the circuit include: a comparator, a D/A converter, a successive approximation register, and a reference voltage source. The working principle is that it is essentially the binary search method, and the principle of peacetime balance is the same. In the A/D conversion, the D/A converter increases the number of conversion bits bit by bit from high to low, generates different output voltages, and compares the input voltage with the output voltage. First, the highest bit is set to 1, which is equivalent to 1/2 of the reference voltage to be compared with the input voltage. If the input voltage is less than 1/2 of the reference voltage, the highest position is 0, otherwise it is set to 1. After that, the second highest position is 1, which is equivalent to a binary search in the range of 1/2, and so on, successive approximation. Its characteristics are fast speed and high conversion precision. It only needs M clock pulses for the N-bit A/D converter. It can be used to measure the transition process from tens to hundreds of microseconds. A common method of conversion. (5) Important indicators of A/D conversion (possibly taking some simple calculations) A. Resolution: Reflects the ability of the A/D converter to respond to small changes in input, usually expressed as the level of the analog voltage corresponding to the lowest bit of the digital output (LSB). The n-bit A/D converter can reflect the analog input level of 1/2n full scale. B. Range: The range of analog input voltages that can be converted is divided into unipolar and bipolar types. C. Conversion time: The time required to complete an A/D conversion, and the reciprocal is the conversion rate. D. Accuracy: Accuracy and resolution are two different concepts. Even if the resolution is high, the accuracy may not be high enough due to temperature drift, linearity, and the like. Accuracy has two representations of absolute precision and relative precision. The absolute accuracy is usually expressed in terms of the fractional value of the least significant bit LSB of the digital quantity, and the relative accuracy is expressed by the percentage of its analog voltage full scale. For example, a full-scale 10V, 10-bit A/D chip, if its absolute accuracy is ±1/2LSB, the quantization unit of its least significant bit LSB is: 10/1024=9.77mv, and its absolute accuracy is 9.77mv/2= 4.88mv, the relative accuracy is: 0.048%. 6, D / A interface basic (1) The D/A converter converts the digital quantity into an analog quantity. (2) In an integrated circuit, a T-type network is usually used to convert a digital Capacitor Leakage Test Power Supplies The ADP series capacitor leakage test power supply is specially designed and customized for capacitor manufacturers` product quality control process or users of capacitors for capacitor ripple current durability life test.
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