Analysis of Rich Routing Resources in FPGA Chips

The routing resources connect all the cells inside the FPGA, and the length and process of the wires determine the driving capability and transmission speed of the signals on the wires. The FPGA chip has a wealth of wiring resources inside, and is divided into four different categories according to the process, length, width and distribution position.

The first type is the global routing resource for the internal clock of the chip and the global reset/set wiring;

The second type is a long-term resource for completing the wiring of the high-speed signal between the chip banks and the second global clock signal;

The third category is short-term resources used to complete the logical interconnection and routing between basic logic cells;

The fourth category is distributed routing resources for control signal lines such as proprietary clocks and resets.

In practice, the designer does not need to directly select the routing resources, and the layout router can automatically select the routing resources to connect the various module units according to the topology and constraints of the input logical network table. In essence, there is a close and direct relationship between the use of routing resources and the results of the design.

Timing Belt

Timing Belt,Lift Door Machine Belt,Elevator Door Machine Belt,Elevator Timing Belt

Shanghai Janetec Electric Co., Ltd. , https://www.janetecelectric.com